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    Please use this identifier to cite or link to this item: http://ccur.lib.ccu.edu.tw/handle/A095B0000Q/409


    Title: 應用於第五代行動通訊系統之毫米波前端收發機晶片設計;Design of Millimeterwave Front-end Chips for the Fifth-Generation Mobile Communications
    Authors: 詹皓程;CHAN, HAO-CHENG
    Contributors: 電機工程研究所
    Keywords: 主頻驅動;收發機晶片;毫米波;次諧波驅動;fundamentally-pumped;transceiver;millimeter-wave;sub-harmonically-pumped
    Date: 2017
    Issue Date: 2019-07-17
    Publisher: 電機工程研究所
    Abstract: 本論文設計應用於第五代行動通訊之90-nm CMOS毫米波前端收發晶片,包含主頻驅動(Fundamentally-pumped)混頻收發機與次諧波 (Sub-harmonic)驅動混頻收發機,本論文兩顆毫米波收發機晶片可搭配前端天線模組或切換器(Switch)來達到分時雙工或是分頻雙工系統。第一顆主頻驅動混頻收發機由發射端之驅動放大器、升頻器,接收端之低雜訊放大器、降頻器,及本地震盪源之緩衝放大器及威爾金森功率分配器組成。在毫米波系統上使用需要高頻的本地震盪源功率輸入來提供混頻器混頻,且也有本地震盪端訊號洩漏的問題。因此第二顆次諧波驅動混頻收發機將主頻驅動混頻器改為次諧波驅動混頻器,其餘電路相同。主頻驅動收發機的量測結果為,發射增益為10 dB,接收增益為16 dB, 1 dB壓縮點之發射功率值為2 dBm,發射與接收之返回損耗皆大於10 dB,整體功耗為1.25 W,晶片面積為3.25 mm2。次諧波驅動收發機的量測結果為,發射增益為7 dB,1 dB壓縮點之發射功率值為-15 dBm,發射與接收之返回損耗皆大於10 dB,整體功耗為1.17 W,晶片面積為3.25 mm2。在與其他毫米波段文獻比較中,本論文晶片有面積更小、輸出功率更大、和射頻頻寬更大的特性。
    In this paper, two millimeter-wave front-end transceiver chips are designed for the 5th-Generation Mobile Communication using 90-nm CMOS technology, including fundamentally-pumped and sub-harmonically-pumped transceivers. These two transceivers can be used for time-division duplexing or frequency-division duplexing. The fundamentally-pumped transceiver is composed of a driver amplifier, a buffer, a low noise amplifier, up/down-convert mixer, and a Wilkinson power divider. The fundamentally-pumped transceiver requires high frequency local oscillation source and, hence, has LO leakage problem. In contrast, the sub-harmonic transceiver can alleviate the LO leakage effect.The measurement results show that fundamentally-pumped transceiver has 10 dB of up-conversion gain, 16 dB down-conversion gain, and 2 dBm 1-dB gain compression power. The return losses are greater than 10 dB for all input and output ports. The overall power consumption is 1.25 W and the chip size is 3.25 mm2. The sub-harmonically-pumped transceiver has the measured 7 dB of up-conversion gain and -15 dBm P1dB. The return losses are more than 10 dB for all input and output port. The overall power consumption is 1.17 W and the chip size is 3.25 mm2. The implemented transceivers have smaller chip size, higher output power, and wider. The chip have RF bandwidth than the works in literature.
    Appears in Collections:[電機工程研究所] 學位論文

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